Faculty of Engineering
Refer to the specific census and withdrawal dates for the semester(s) in which this unit is offered.
Dr David Boland Clayton); Mr Nader Kamrani (Malaysia)
This unit introduces the student to modern logic design techniques, hardware used and common representations. Topics include two and multi-level combinational logic, decoders, multiplexers, arithmetic circuits, programmable and steering logic, flip-flops, registers, counters, RAM and ROM. Using this hardware the design component will include finite state machine design and applications to computer data path control. This will incorporate simple analogue and digital I/O interfacing. Programmable logic devices will be covered, and the use of a hardware description language for describing, synthesizing and testing digital logic. Laboratories cover logic design, implementation, and testing.
On successful completion of this unit, students will be able to:
Laboratory and assignment work: 30%
Examination (3 hours): 70%
Students are required to achieve at least 45% in the total continuous assessment component (assignments, tests, mid-semester exams, laboratory reports) and at least 45% in the final examination component and an overall mark of 50% to achieve a pass grade in the unit. Students failing to achieve this requirement will be given a maximum of 45% in the unit.
3 hours lectures, 3 hours laboratory and practice classes and 6 hours of private study per week
See also Unit timetable information
ECE2701, TEC2172, TRC2300